News BoT
RSS Feed
Joined: 11 May 2006
Posts: 32637
 |
 Posted: Fri Dec 02, 2011 9:00 am Post subject: AMD Revises Bulldozer Transistor Count: 1.2B, not 2B |
  |
|
<p align="center"> </p><p><p>
This is a bit unusual. I got an email from AMD PR this week asking me to correct the Bulldozer transistor count in our Sandy Bridge E review. The incorrect number, provided to me (and other reviewers) by AMD PR around 3 months ago was 2 billion transistors. The actual transistor count for Bulldozer is apparently 1.2 billion transistors. I don't have an explanation as to why the original number was wrong, just that the new number has been triple checked by my contact and is indeed right. The total die area for a 4-module/8-core Bulldozer remains correct at 315mm2.</p>
<table align="center" border="0" cellpadding="0" cellspacing="1" width="575">
<tbody>
<tr class="tgrey">
<td align="center" colspan="9">
CPU Specification Comparison</td>
</tr>
<tr class="tlblue">
<td width="120">
CPU</td>
<td align="center" valign="middle" width="85">
Manufacturing Process</td>
<td align="center" valign="middle" width="85">
Cores</td>
<td align="center" valign="middle" width="85">
Transistor Count</td>
<td align="center" valign="middle" width="85">
Die Size</td>
</tr>
<tr>
<td class="tlgrey">
AMD Bulldozer 8C</td>
<td align="center" valign="middle">
32nm</td>
<td align="center" valign="middle">
8</td>
<td align="center" valign="middle">
1.2B <strike>~2B</strike></td>
<td align="center" valign="middle">
315mm<sup>2</sup></td>
</tr>
<tr>
<td class="tlgrey">
AMD Thuban 6C</td>
<td align="center" valign="middle">
45nm</td>
<td align="center" valign="middle">
6</td>
<td align="center" valign="middle">
904M</td>
<td align="center" valign="middle">
346mm<sup>2</sup></td>
</tr>
<tr>
<td class="tlgrey">
AMD Deneb 4C</td>
<td align="center" valign="middle">
45nm</td>
<td align="center" valign="middle">
4</td>
<td align="center" valign="middle">
758M</td>
<td align="center" valign="middle">
258mm<sup>2</sup></td>
</tr>
<tr>
<td class="tlgrey">
Intel Gulftown 6C</td>
<td align="center" valign="middle">
32nm</td>
<td align="center" valign="middle">
6</td>
<td align="center" valign="middle">
1.17B</td>
<td align="center" valign="middle">
240mm<sup>2</sup></td>
</tr>
<tr>
<td class="tlgrey">
Intel Sandy Bridge E (6C)</td>
<td align="center" valign="middle">
32nm</td>
<td align="center" valign="middle">
6</td>
<td align="center" valign="middle">
2.27B</td>
<td align="center" valign="middle">
435mm<sup>2</sup></td>
</tr>
<tr>
<td class="tlgrey">
Intel Nehalem/Bloomfield 4C</td>
<td align="center" valign="middle">
45nm</td>
<td align="center" valign="middle">
4</td>
<td align="center" valign="middle">
731M</td>
<td align="center" valign="middle">
263mm<sup>2</sup></td>
</tr>
<tr>
<td class="tlgrey">
Intel Sandy Bridge 4C</td>
<td align="center" valign="middle">
32nm</td>
<td align="center" valign="middle">
4</td>
<td align="center" valign="middle">
995M</td>
<td align="center" valign="middle">
216mm<sup>2</sup></td>
</tr>
<tr>
<td class="tlgrey">
Intel Lynnfield 4C</td>
<td align="center" valign="middle">
45nm</td>
<td align="center" valign="middle">
4</td>
<td align="center" valign="middle">
774M</td>
<td align="center" valign="middle">
296mm<sup>2</sup></td>
</tr>
<tr>
<td class="tlgrey">
Intel Clarkdale 2C</td>
<td align="center" valign="middle">
32nm</td>
<td align="center" valign="middle">
2</td>
<td align="center" valign="middle">
384M</td>
<td align="center" valign="middle">
81mm<sup>2</sup></td>
</tr>
<tr>
<td class="tlgrey">
Intel Sandy Bridge 2C (GT1)</td>
<td align="center" valign="middle">
32nm</td>
<td align="center" valign="middle">
2</td>
<td align="center" valign="middle">
504M</td>
<td align="center" valign="middle">
131mm<sup>2</sup></td>
</tr>
<tr>
<td class="tlgrey">
Intel Sandy Bridge 2C (GT2)</td>
<td align="center" valign="middle">
32nm</td>
<td align="center" valign="middle">
2</td>
<td align="center" valign="middle">
624M</td>
<td align="center" valign="middle">
149mm<sup>2</sup></td>
</tr>
</tbody>
</table>
<p>
Despite the downward revision in Bulldozer's transistor count by 800M, AMD's first high-end 32nm processor still boasts a higher transistor density than any of its 45nm predecessors (as you'd expect):</p>
<p style="text-align: center; ">
 </p>
<p>
Transistor density depends on more than just process technology. The design of the chip itself including details like the balance between logic, cache and IO transistors can have a major impact on how compact the die ends up being. Higher transistor densities are generally more desirable to a manufacturer (fewer defects per die, more die per wafer, lower costs), but from the end user's perspective the overall price/performance (and power?) ratio is what ultimately matters.</p>
</p>
Read more...
Source: AnandTech
This channel features the latest computer hardware related articles. |
|
