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<p align="center"></p><p><p>
Earlier today Micron announced its first 16nm MLC NAND device. The 128Gbit device is architecturally identical to the current 20nm/128Gbit 2-bit-per-cell MLC device that's shipping today but smaller. That means we're talking about a 16K page size and 512 pages per block (two planes). Micron didn't share many details of the new device other than to say that it'd be available in the same package (152-ball BGA 14x18mm) and feature roughly the same performance as the current 20nm part. The performance claim is an interesting one since performance typically decreases with each NAND generation as we've seen in the past. Micron's exact wording was "similiar performance" to existing 20nm 128Gbit MLC parts, which doesn't necessarily mean identical.&nbsp;</p>
<table align="center" border="0" cellpadding="0" cellspacing="1" width="650">
<tbody>
<tr class="tgrey">
<td align="center" colspan="13">
Micron NAND Evolution</td>
</tr>
<tr class="tlblue">
<td>
&nbsp;</td>
<td align="center" valign="middle">
50nm</td>
<td align="center" valign="middle">
34nm</td>
<td align="center" valign="middle">
25nm</td>
<td align="center" valign="middle">
20nm</td>
<td align="center" valign="middle">
20nm</td>
<td align="center" valign="middle">
16nm</td>
</tr>
<tr>
<td class="tlgrey">
Single Die Max Capacity</td>
<td align="center" valign="middle">
16Gbit</td>
<td align="center" valign="middle">
32Gbit</td>
<td align="center" valign="middle">
64Gbit</td>
<td align="center" valign="middle">
64Gbit</td>
<td align="center" valign="middle">
128Gbit</td>
<td align="center" valign="middle">
128Gbit</td>
</tr>
<tr>
<td class="tlgrey">
Page Size</td>
<td align="center" valign="middle">
4KB</td>
<td align="center" valign="middle">
4KB</td>
<td align="center" valign="middle">
8KB</td>
<td align="center" valign="middle">
8KB</td>
<td align="center" valign="middle">
16KB</td>
<td align="center" valign="middle">
16KB</td>
</tr>
<tr>
<td class="tlgrey">
Pages per Block</td>
<td align="center" valign="middle">
128</td>
<td align="center" valign="middle">
128</td>
<td align="center" valign="middle">
256</td>
<td align="center" valign="middle">
256</td>
<td align="center" valign="middle">
512</td>
<td align="center" valign="middle">
512</td>
</tr>
<tr>
<td class="tlgrey">
Read Page (max)</td>
<td align="center" valign="middle">
-</td>
<td align="center" valign="middle">
-</td>
<td align="center" valign="middle">
75 &micro;s</td>
<td align="center" valign="middle">
100 &micro;s</td>
<td align="center" valign="middle">
115 &micro;s</td>
<td align="center" valign="middle">
?</td>
</tr>
<tr>
<td class="tlgrey">
Program Page (typical)</td>
<td align="center" valign="middle">
900 &micro;s</td>
<td align="center" valign="middle">
1200 &micro;s</td>
<td align="center" valign="middle">
1300 &micro;s</td>
<td align="center" valign="middle">
1300 &micro;s</td>
<td align="center" valign="middle">
1600 &micro;s</td>
<td align="center" valign="middle">
?</td>
</tr>
<tr>
<td class="tlgrey">
Erase Block (typical)</td>
<td align="center" valign="middle">
-</td>
<td align="center" valign="middle">
-</td>
<td align="center" valign="middle">
3 ms</td>
<td align="center" valign="middle">
3 ms</td>
<td align="center" valign="middle">
3.8 ms</td>
<td align="center" valign="middle">
?</td>
</tr>
<tr>
<td class="tlgrey">
Die Size</td>
<td align="center" valign="middle">
-</td>
<td align="center" valign="middle">
172mm²</td>
<td align="center" valign="middle">
167mm²</td>
<td align="center" valign="middle">
118mm²</td>
<td align="center" valign="middle">
202mm²</td>
<td align="center" valign="middle">
?</td>
</tr>
<tr>
<td class="tlgrey">
Gbit per mm²</td>
<td align="center" valign="middle">
-</td>
<td align="center" valign="middle">
0.186</td>
<td align="center" valign="middle">
0.383</td>
<td align="center" valign="middle">
0.542</td>
<td align="center" valign="middle">
0.634</td>
<td align="center" valign="middle">
?</td>
</tr>
<tr>
<td class="tlgrey">
Rated Program/Erase Cycles</td>
<td align="center" valign="middle">
10000</td>
<td align="center" valign="middle">
5000</td>
<td align="center" valign="middle">
3000</td>
<td align="center" valign="middle">
3000</td>
<td align="center" valign="middle">
3000</td>
<td align="center" valign="middle">
~3000</td>
</tr>
</tbody>
</table>
<p>
The one bit of information that Micron is unfortunately not sharing is the actual size of its 16nm 128Gb NAND device. Citing competitive concerns, Micron is only saying that it's the industry's smallest 128Gb MLC NAND device.</p>
<p>
Micron is targeting 3000 program/erase cycles for its 16nm NAND device. Micron's 16nm NAND is sampling now, and will be in production in the Q4 of this year. Micron expects to ship SSDs based on its 16nm NAND in 2014. If the 20nm ramp is any indication, we should expect 16nm NAND in drives in around a year from now.</p>
<div>Gallery: Micron Announces 16nm 128Gb MLC NAND, SSDs in 2014<div></div></div></p>

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Source: AnandTech
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