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 Posted: Thu May 31, 2012 4:00 pm Post subject: Dual Core/GT2 Ivy Bridge Die Measured: ~121mm^2 |
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<p align="center"> </p><p><p>
I mentioned Intel's desired secrecy around die sizes and transistor counts for the majority of the Ivy Bridge lineup in our 3470 review from this morning. While I can't count individual transistors in the Core i7-3517U that was in ASUS' Zenbook Prime UX21A we reviewed a week ago, I can measure its exposed die. </p>
<p>
Mobile CPUs rarely feature integrated heatspreaders, giving us direct access to the back side of the processor die itself. The dual-core die looks very similar to the quad-core die, it's just not as long. Armed with a pair of digital calipers, I can get a good idea of the CPU's die area.</p>
<p>
The die measures approximately 14.7mm x 8.2mm, covering 120.54mm^2 of area. That's roughly 75% of the die area of the quad-core/GT2 Ivy Bridge part:</p>
<table align="center" border="0" cellpadding="0" cellspacing="1" width="575">
<tbody>
<tr class="tgrey">
<td align="center" colspan="9">
CPU Specification Comparison</td>
</tr>
<tr class="tlblue">
<td width="120">
CPU</td>
<td align="center" valign="middle" width="85">
Manufacturing Process</td>
<td align="center" valign="middle" width="85">
CPU Cores</td>
<td align="center" valign="middle" width="85">
Transistor Count</td>
<td align="center" valign="middle" width="85">
Die Size</td>
</tr>
<tr>
<td class="tlgrey">
Apple A5R2</td>
<td align="center" valign="middle">
32nm LP</td>
<td align="center" valign="middle">
2</td>
<td align="center" valign="middle">
??</td>
<td align="center" valign="middle">
69mm<sup>2</sup></td>
</tr>
<tr>
<td class="tlgrey">
Apple A5X</td>
<td align="center" valign="middle">
45nm LP</td>
<td align="center" valign="middle">
2</td>
<td align="center" valign="middle">
??</td>
<td align="center" valign="middle">
163mm<sup>2</sup></td>
</tr>
<tr>
<td class="tlgrey">
AMD Bulldozer 8C</td>
<td align="center" valign="middle">
32nm</td>
<td align="center" valign="middle">
8</td>
<td align="center" valign="middle">
1.2B</td>
<td align="center" valign="middle">
315mm<sup>2</sup></td>
</tr>
<tr>
<td class="tlgrey">
Intel Ivy Bridge 2C (GT2)</td>
<td align="center" valign="middle">
<strong>22nm</strong></td>
<td align="center" valign="middle">
<strong>2</strong></td>
<td align="center" valign="middle">
<strong>??</strong></td>
<td align="center" valign="middle">
<strong>121mm<sup>2</sup></strong></td>
</tr>
<tr>
<td class="tlgrey">
Intel Ivy Bridge 4C (GT2)</td>
<td align="center" valign="middle">
22nm</td>
<td align="center" valign="middle">
4</td>
<td align="center" valign="middle">
1.4B</td>
<td align="center" valign="middle">
160mm<sup>2</sup></td>
</tr>
<tr>
<td class="tlgrey">
Intel Sandy Bridge E (6C)</td>
<td align="center" valign="middle">
32nm</td>
<td align="center" valign="middle">
6</td>
<td align="center" valign="middle">
2.27B</td>
<td align="center" valign="middle">
435mm<sup>2</sup></td>
</tr>
<tr>
<td class="tlgrey">
Intel Sandy Bridge E (4C)</td>
<td align="center" valign="middle">
32nm</td>
<td align="center" valign="middle">
4</td>
<td align="center" valign="middle">
1.27B</td>
<td align="center" valign="middle">
294mm<sup>2</sup></td>
</tr>
<tr>
<td class="tlgrey">
Intel Sandy Bridge 4C</td>
<td align="center" valign="middle">
32nm</td>
<td align="center" valign="middle">
4</td>
<td align="center" valign="middle">
1.16B</td>
<td align="center" valign="middle">
216mm<sup>2</sup></td>
</tr>
<tr>
<td class="tlgrey">
Intel Lynnfield 4C</td>
<td align="center" valign="middle">
45nm</td>
<td align="center" valign="middle">
4</td>
<td align="center" valign="middle">
774M</td>
<td align="center" valign="middle">
296mm<sup>2</sup></td>
</tr>
<tr>
<td class="tlgrey">
Intel Sandy Bridge 2C (GT1)</td>
<td align="center" valign="middle">
32nm</td>
<td align="center" valign="middle">
2</td>
<td align="center" valign="middle">
504M</td>
<td align="center" valign="middle">
131mm<sup>2</sup></td>
</tr>
<tr>
<td class="tlgrey">
Intel Sandy Bridge 2C (GT2)</td>
<td align="center" valign="middle">
32nm</td>
<td align="center" valign="middle">
2</td>
<td align="center" valign="middle">
624M</td>
<td align="center" valign="middle">
149mm<sup>2</sup></td>
</tr>
</tbody>
</table>
<p>
I included the two Apple SoCs to put Intel's 2C/GT2 die size in perspective. It's entirely possible to build very high performance smartphone/tablet class silicon given a modern enough manufacturing process. While I doubt we'll see anything this class in an iPad anytime soon, when we get to Broadwell (14nm Haswell shrink) the tablet market will be very interesting indeed. Haswell is expected to narrow the idle power consumption gap that separates ARM and big x86 silicon, while increasing die size at the high end. Broadwell will bring die area back in check with a move to 14nm.</p>
<p>
<div>Gallery: Dual Core/GT2 Ivy Bridge Die Measured: ~121mm^2<div>    </div></div></p>
</p>
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Source: AnandTech
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